#10 🚀 Reducing EMI at Flyback and AI Models Vs Experiments

The Newsletter of High Frequency folks

👋 Hello! Dr. Molina here! 👨‍🔧

🤗 Thank you for reading and welcome to the show my Newsletter. I’m the CEO of Frenetic, we help great companies to find, design, and manufacture all their magnetics. We have a free trial of our Online Simulator, just register on our web and enjoy it!

Today I will talk about:

👉 I’ll talk about the AI models and the experimental verifications

👉 my regular update about Product

👉 Finally, I will visit the dark side of the EMI, with a special focus on Flyback.

Before starting, I would like to ask you for a favor. If you find interesting this Newsletter, subscribe and share it with your friends!! Thank you 🤓.

AI Prediction Vs Experimental data

Show me the experiments!!

This week I posted on Linkedin a post about the transparency of Frenetic to compare our predictions with experimental results, something, I have never seen in other software products like any circuit simulator or FEM software (Comsol or Maxwell).

We are creating data continuously because we need data for training our algorithms (and verifying the functionality), therefore, we can even tell the current average error on the Artificial Intelligence Model for the Leakage Inductance (Currently, the accuracy is about 90%).

However, I would like other software to do the same or engineers to be more demanding with their providers, because if we can do it, everyone can.

Related to the data. The department of Power Electronics at Princeton has created an open database of experimental data about core losses. On their web, you can use their models or even see the data. I think this is finally a great sign about the evolution of Artificial Intelligence applied to Power Electronics. I have been writing for the last 4 years about this. Here is one of my articles. If you want the pdf, send me a Linkedin message and I will send you the pdf.

Product

This week in terms of Product I have two things to tell:

1. Product Team Organization

   We have structured the product team at Frenetic, splitting the product in 4 small products and building squads, where each squad includes a Businessperson, marketing, Magnetic expert, and developers.

   Additionally, with the size of the current development team, we are putting much more effort in defining very well the functionalities, writing specifications before writing any line of code.

2. Books

   I’m reading another book about Products. I finished The Cold Start Problem and now I reading Product-Led Growth. I believe in Frenetic as a company with a product leadered by scientists and leading the growth. The book talks about the importance of building products that users don´t need external support to use.

Reducing EMI at Flyback

One of the most common questions I receive talking with engineers with a lot of expertise in Flyback magnetics is:

Can you (Frenetic) help in the EMI reduction?

Most engineers already have their design spreadsheet (Please, consider avoiding spreadsheets…are a great source of free iterations), but they don´t have any idea about what to do for reducing EMI noise in their Flybacks. Since not everyone could be an expert in EMI, let’s start defining the problem.

Reducing EMI in the Flyback topology

In this edition, I will focus on the EMI in Flybacks.

As you know, switch-mode power supplies produce electromagnetic noise due to the fast voltage or current transitions. In the Flyback, there are two main sources of noise:

1. High dV/dt point. The net between the transformer and the transistor. The transistor switches very fast and the voltage there changes very fast producing a lot of noise. This noise travels through the parasitic capacitance between primary and secondary.

Figure 1. Flyback schematic. Marked the noise net and the intrawinding capacitance.

2. High dI/dt current loops. Just having a dI/dt loop is a problem itself. In the Flyback we can have fast changing currents in three parts. In the picture below you can see these loops. The best way to avoid this kind of problems is decreasing the distance between the pads in the layout of the PCB.

Figure 2. Flyback schematic. Marked the current loops generating EMI.

Today, I will focus on the High dV/dt noise, which is attenuated with a CM filter plus Y capacitors at the input. However, the transformer construction has a lot of impact on the EMI results. I have used the publication of TI of Isaac Cohen to build my explanation.

(as always, if you don´t find the pdf, send me a Linkeding message and I will send you the pdf).

Flyback Transformer techniques for reducing EMI

As we have seen in the Picture X, the CM current,Icm, that flows from primary to secondary through the interwinding capacitance of the transformer.

⭐️ Therefore, reducing the interwinding capacitance between primary and secondary, minimize the Icm.

🧵 Methods for decreasing the interwinding capacitance

Method I: Transformer Shields

The shield layers (Figure 3) are cooper layers included in the windings to give a lower impedance path to the Icm. This layer should be as thin as possible to minimize eddy current losses and is usually connected to the local primary ground (or any other quiet ground). Shield layers don´t eliminate the interwinding capacitance, but reduce the current flowing through them.

👉 For interleaving windings, several shield layers will be needed. 😞

Figure 3. Flyback schematic with shield layer.

Method II: Cancellation Windings

Another method is to include auxiliary cancellation winding. The polarity of the auxiliary winding is oriented to produce a cancelling current by adjusting the number of turns. Basically, this auxiliary winding goal is cancelling the Icm, generating another Icm with reverse polarity, having zero net CM current flowing to the output. The manufacturing process in this case is more complex.

Figure 4. Flyback schematic with auxiliary cancellation winding.

Another solution, is arrange the auxiliary winding to to achieve a CM balance. That means, instead of connecting the winding to the primary ground, is connected to an auxiliary ground, ensuring the voltage balance. In the picture below you can see the schematic with this auxiliary strategy (NB2) and shield layers too.

Figure 5. Flyback schematic with auxiliary EMI cancellation windings.

Construction example

In the design guide of TI, they analyze a lot of different solutions and their impact on reducing the EMI noise. Here, I would like to show you one of the examples included in the TI publication. The Figure 6 represents the construction of the schematic of Figure 5. The component has an additional auxiliary winding for supplying the controller (NB1), the CM cancellation winding (NB2) and the shield layer.

Figure 6. Winding strategy for the schematic of Figure 5.

As you can see, the shield layer between primary and secondary, closer to the external part and windings (NB1 and NB2) in a single layer. The primary is splited in two layers to reduce the leakage inductance.

This is the first time talking about this topic and I don´t know the general interest of this topic for the audience, therefore, can you please give me feedback about it?

If you find interesting this topic, give a like or a comment and I will enter in more detail. Specially, I’m thinking to build a Flyback with this winding arrangements and measure the interwinding capacitance and the leakage.

Reference

I have based this edition on the work of Isaac Cohen of TI (TI Flyback design guide), a great engineer who has supported our research at Frenetic about core losses.

Top finds🧑🏽‍🌾

Product/Web: Flux (This startup looks great, Online tools for PCB, circuit simulation…)

Book: Las ramas del azar (Poems in spanish)

Thank you again for reading and don´t forget to share it.

Have a nice week!!

Sincerely,

Chema 👋